Below are the lists of workshops and tutorials co-organized with ASPLOS and EuroSys 2025.
Further down, we show the schedule of the two workshop/tutorial days (Sunday 30th March and Monday 1st April 2025).
Workshops
- SIGARCH Visioning Workshop | Sustainable Computing: Challenges, Implications, and Opportunities
- 5th European Workshop on Machine Learning and Systems (EuroMLSys)
- Principles and Practice of Consistency for Distributed Data (PaPoC)
- ASPLOS 2025 Contest Tracks
- 7th Young Architect Workshop (YArch)
- 5th Edition of CHEOPS Workshop on Challenges and Opportunities of Efficient and Performant Storage Systems (CHEOPS)
- 4th Workshop on Heterogeneous Composable Disaggregated Systems (HCDS)
- 8th International Workshop on Edge Systems, Analytics and Networking (EdgeSys)
- 3rd Workshop & Tutorial on SErverless Systems, Applications, and MEthodologies (SESAME)
- 2nd Workshop on Empowering Software Development through Machine Learning (eSwML)
- 1st Workshop on Memory-Centric Computing Systems (MCCSys)
- 1st International Workshop on Systems and Methods for Sustainable Large-Scale AI (GreenSys)
- 5th Workshop on Languages, Tools, and Techniques for Accelerator Design (LATTE)
- 5th Workshop on Benchmarking and Performance of Machine Learning Workloads on Emerging Hardware (MLBench)
- 3rd International Workshop on Testing Distributed Internet of Things Systems (TDIS)
- 1st Workshop on Systems and Architectures For Encrypted AI (SAFE-AI)
- Content-Aware Caching and Scheduling for Transformer Model Serving (CAT-Serve)
- A Workshop on Systems and Architectures for Neural Rendering, AR/VR, and Visual Computing (VisArch)
- 2nd International Workshop on MetaOS for the Cloud-Edge-IoT Continuum (MECC)
- 1st Workshop on Operating System Research for Connected Intelligence (WOSCI)
- User-Schedulable Languages (USL)
- European Workshop on Systems Security (EuroSec)
- 20th EuroSys Doctoral Workshop (EuroDW)
Tutorials
- XiangShan: An Open-Source High-Performance RISC-V Processor and Infrastructure for Architecture Research
- Agile Hardware Specialization
- Quantum Circuit Synthesis and Circuit Optimization
- Efficient Systems and Compilers for Generative AI (GenAI Catalyst)
- 3rd Tutorial on ILLIXR: Illinois Extended Reality Testbed
- 4th Tutorial on Mapping and Affinity: Bridging Applications and Hardware (MAP)
- 1st Tutorial on Understanding CXL: Memory, Coherence, and Opportunities in System Design
- AIBrix: An Open Source Large-Scale LLM Inference infrastructure for System Research
- xDSL: a Python-based compiler ecosystem
- OpenHarmony OS in System Research: A Practical Guide
- Open-source infrastructure for FPGAs in the datacenter: from the OS to the network
- Push the science and maximize performance with AWS Trainium – Tutorial for NKI
Sunday 30 March
| Room | Morning | Afternoon |
|---|---|---|
| Mees II | FPGAs in the datacenter | XiangShan tutorial |
| Mees I | YArch | |
| Penn room II | MCCSys | |
| Penn room I | ASPLOS 2025 Contest Tracks | |
| Leeuwen room I | GreenSys | |
| Leeuwen room II | xDSL | AIBrix |
| Goudriaan I | HCDS | Understanding CXL |
| Goudriaan II | GenAI Catalyst | ILLIXR |
| J.F. Staalroom | LATTE | |
| New York I (upstairs) | Agile hardware tutorial | Quantum Circuit |
| New York II (upstairs) | MLBench | |
| Tokyo Room (first floor) | SIGARCH Visioning: Sustainable Computing | |
| Blue Room | VisArch | |
Monday 31 March
| Room | Morning | Afternoon |
|---|---|---|
| Mees II | EdgeSys | |
| Mees I | SESAME | |
| Penn room II | EuroMLSys | |
| Penn room I | EuroSec | |
| Leeuwen room I | CHEOPS | |
| Leeuwen room II | Amazon NKI | TDIS |
| Goudriaan I | OpenHarmonyOS | eSwML |
| Goudriaan II | CAT-Serve | MAP |
| J.F. Staalroom | PaPoC 2025 | |
| New York I (upstairs) | MECC | |
| New York II (upstairs) | SAFE-AI | |
| Tokyo Room (first floor) | EuroSys Doctoral Workshop (EuroDW) | |
| Blue Room | USL | WOSCI |