Below are the lists of workshops and tutorials organized with ASPLOS 2026.
Workshops
- The 18th Workshop on General Purpose Processing Unit (GPGPU-18)
- Ramulator and DRAM Bender: Cutting-Edge Infrastructures for Real and Future Memory System Evaluation
- 6th Workshop on Benchmarking and Performance of Machine Learning Workloads on Emerging Hardware (MLBench)
- EMC²: Energy Efficient Machine Learning & Cognitive Computing (12th Edition)
- 7th Workshop on Cloud Intelligence & AIOps
- VisArch: A Workshop on Systems and Architectures for Neural Rendering, AR/VR, and Visual Computing
- 2nd Workshop on Ethical System and Architecture Design (HotEthics)
- 3rd Workshop on Unary Computing (WUC)
- 2nd HPC/AI Integration with Quantum Computing/Networking (HAIQ) Workshop
- 5th Workshop on Memory-Centric Computing Systems (MCCSys)
- Architecture 2.0: Workshop on AI for Computing Systems Design
- 5th Workshop on Heterogeneous Composable Disaggregated Systems (HCDS 2026)
- Agentic OS: Operating Systems Design for AI Agents (AgenticOS 2026)
- Languages, Tools, and Techniques for Accelerator Design
- CoDAIM 2026: 1st Workshop on Co-Design for Agentic and Multimodal AI
- Virtuoso: Ideas and Infrastructures for Novel HW/OS Interfaces
Tutorials
- Jaseci: Unifying AI, Backend, and Scale through Language and Runtime Co-Design
- CrypTorch: Easy-to-use and Efficient PyTorch-based Compiler Infrastructure for Machine Learning with MPC
- CPA: Cryptographic Primitives Acceleration (Homomorphic Encryption and Zero-knowledge Proof)
- AI for Quantum Computing
- Q-VTK: the Quantum Visualization Toolkit
- ACT: End-to-End Compiler Infrastructure for Emerging AI Accelerators
- Hybrid Oscillator-Qubit Quantum Processors — Instruction Set Architecture, Abstract Machine Models, and Applications
- Building Efficient Large-Scale Model Systems with DeepSpeed: From Open-Source Foundations to Emerging Research
- IRON AI Engine API for Ryzen™ AI NPU
- RAIC: Reconfigurable AI Computing
- MemSysExplorer – a community research framework for evaluating next-generation memory systems
- AI-Driven Accelerator Programming with LLMLift and Autocomp
- SPIRAL: Pre-Silicon and Early-Prototype Performance Estimation Using Highly Optimized Code
Sunday, March 22
| Room | Morning Slot | Afternoon Slot | |
| West End | GPGPU-18 | Ramulator and DRAM Bender | |
| Allegheny | MLBench | ||
| Ft. Pitt | EMC² | ||
| Warhol | Jaseci | CrypTorch | |
| Carson | CPA | AI for Quantum Computing | |
| Clemente | Cloud Intelligence & AIOps | ||
| Ohio | Q-VTK | Compiler Infrastructure for Tensor Accelerators | |
| Monogahela | VisArch | HotEthics | |
| Ft. Duquesne | Hybrid Oscillator-Qubit Quantum Processors | WUC |
Monday, March 23
| Room | Morning Slot | Afternoon Slot | |
| West End | HAIQ | ||
| Allegheny | Large-Scale Model Systems with DeepSpeed | MCCSys | |
| Ft. Pitt | Architecture 2.0 | ||
| Warhol | IRON AI Engine API for Ryzen™ AI NPU | RAIC | |
| Carson | MemSysExplorer | HCDS 2026 | |
| Clemente | AI-Driven Accelerator Programming | AgenticOS 2026 | |
| Ohio | LATTE | ||
| Monogahela | SPIRAL | CoDAIM 2026 | |
| Ft. Duquesne | Virtuoso |