ASPLOS 2026 Program Overview
Pittsburgh, PA — March 24-26, 2026
Start: 8:30 AM | Lunch: 12:00 PM | End: 6:00 PM | Presentations: 25 min | 167 unique papers
Monday, March 23
| Time | ||||
|---|---|---|---|---|
| 6:00 – 9:30 PM | Poster Session (2nd Floor Hallway 1) | |||
| 6:00 – 9:30 PM | Welcome Reception (Event Center) | |||
Day 1: Tuesday, March 24
| Time | Fort Pitt | West End & Fort Duquesne | Allegheny | Ohio & Monogahela |
|---|---|---|---|---|
| 8:00 – 8:20 AM | Opening Remarks (Event Center) | |||
| 8:30 – 10:35 AM | 1A: LLM Serving: Throughput Optimization | 1B: LLM Serving: Latency & Scheduling | 1C: Quantum Computing: Compilation | 1D: CXL & Memory Fabric |
| 10:35 – 10:55 AM | Coffee Break (Rivers Pre-Function) | |||
| 10:55 – 11:55 AM | Keynote 1 — Partha Ranganthan (Google) (Event Center) | |||
| 12:00 – 1:30 PM | Lunch (Event Center) | |||
| 12:00 – 6:00 PM | Poster Session (2nd Floor Hallway 1) | |||
| 1:30 – 3:35 PM | 2A: LLM Training Systems | 2B: Speculative Decoding | 2C: GPU Systems & Scheduling | 2D: DRAM Reliability & Security |
| 3:35 – 3:55 PM | Coffee Break (Rivers Pre-Function) | |||
| 3:55 – 6:00 PM | 3A: LLM Attention & KV Cache | 3B: Mixture-of-Experts & Efficient Inference | 3C: 3D Gaussian Splatting & Rendering | 3D: Trusted Execution Environments |
| 6:30 – 7:30 PM | WACI Session | |||
| 6:30 – 8:30 PM | Business Meeting | |||
Day 2: Wednesday, March 25
| Time | Fort Pitt | West End & Fort Duquesne | Allegheny | Ohio & Monogahela |
|---|---|---|---|---|
| 8:30 – 10:35 AM | 4A: ML Training & Monitoring | 4B: ML Compilers & Tensor Programs | 4C: Quantum Error Correction | 4D: Processing-in-Memory |
| 10:35 – 10:55 AM | Coffee Break (Rivers Pre-Function) | |||
| 10:55 – 11:55 AM | Keynote 2 — Ion Stoica (UC Berkeley) (Event Center) | |||
| 12:00 – 1:30 PM | Lunch (Event Center) | |||
| 12:00 – 9:00 PM | Poster Session (2nd Floor Hallway 1) | |||
| 1:30 – 3:35 PM | 5A: Generative Model Serving | 5B: On-Device & Edge AI | 5C: Formal Verification | 5D: Storage & Caching |
| 3:35 – 3:55 PM | Coffee Break (Rivers Pre-Function) | |||
| 3:55 – 6:00 PM | 6A: Neural Network Acceleration | 6B: Hardware Design Languages | 6C: Graph & Sparse Computing | 6D: Disaggregated Memory Systems |
| 6:00 – 9:00 PM | Award Ceremony/Banquet (Event Center) | |||
Day 3: Thursday, March 26
| Time | Fort Pitt | West End & Fort Duquesne | Allegheny | Ohio & Monogahela |
|---|---|---|---|---|
| 8:30 – 10:10 AM | 7A: Fully Homomorphic Encryption | 7B: Compilers & Code Generation | 7C: Testing & Fuzzing | 7D: Processor Microarchitecture |
| 10:10 – 10:30 AM | Coffee Break (Rivers Pre-Function) | |||
| 10:30 – 11:30 AM | Keynote 3 — Hillery Hunter (IBM) (Event Center) | |||
| 12:00 – 1:30 PM | Lunch (Event Center) | |||
| 1:30 – 3:10 PM | 8A: GPU Programming | 8B: Serverless & Cloud Networking | 8C: Memory Hierarchy & Performance | 8D: Reconfigurable Architectures |
| 3:10 – 3:30 PM | Coffee Break (Rivers Pre-Function) | |||
| 3:30 – 5:10 PM | 9A: Systems Profiling & Optimization | 9B: Quantum & Emerging Computing | 9C: Reliability & Fault Tolerance | 9D: Network & Cloud Infrastructure |
ASPLOS 2026 Detailed Program
Monday, March 23
18:00 – 21:30 PM EDT: Poster Session
Location: 2nd Floor Hallway 1
18:00 – 21:30 PM EDT: Welcome Reception
Location: Event Center
Day 1: Tuesday, March 24
8:00 – 8:20 AM EDT: Opening Remarks
Location: Event Center
8:30 – 10:35 AM EDT
Session 1A: LLM Serving: Throughput Optimization
Location: Fort Pitt
Session 1B: LLM Serving: Latency & Scheduling
Location: West End & Fort Duquesne
Session 1C: Quantum Computing: Compilation
Location: Allegheny
Session 1D: CXL & Memory Fabric
Location: Ohio & Monogahela
10:35 – 10:55 AM EDT: Coffee Break
Location: Rivers Pre-Function
10:55 – 11:55 AM EDT: Keynote 1 by Partha Ranganthan (Google)
Unicorns, Centaurs, and Cyborgs: Co-design Powering the Intelligence Era
Location: Event Center
Abstract
We are in the middle of a new “intelligence revolution”. From consumer products to enterprise cloud offerings, and even foundational scientific research, Artificial Intelligence (AI) is fundamentally transforming all aspects of our life. These amazing advances have been made possible by equally impressive innovations in the underlying computing systems powering AI, but the continued pace of growth and change will require even more. In this talk, we will discuss verticallyintegrated optimizations in AI infrastructure that have already birthed a new cottage industry of "unicorns", ranging from physical data centers hardware to software and cloud solutions, and identify the exciting opportunities ahead. We will then look forward to future “centaurs and cyborgs,” symbiotic partnerships between human ingenuity and artificial intelligence, highlighting the opportunities and challenges when we use AI to optimize AI. Co-design and collaboration, across the hardware-software stack, across disciplines, and across communities, will be key to this exciting new future
Bio
Partha Ranganathan is currently a VP, technical Fellow at Google where he is the area technical lead for systems infrastructure driving next-generation computing for the AI-era. Prior to this, he was a HP Fellow and Chief Technologist at Hewlett Packard Labs where he led their research on systems and data centers. Partha has pioneered numerous impactful innovations touching billions of users, including widely-adopted ideas across all mobile and cloud systems: energy-aware user interfaces, heterogeneous multi-cores, power-efficient servers, ML and video accelerators, and disaggregated and data-centric data centers. He has published extensively: 150+ papers, including several best paper awards, is the co-author on the popular "Datacenter as a Computer" textbook, and is a co-inventor on 125+ patents. He has been recognized with numerous awards and press features. He has been named a top-15 enterprise technology rock star by Business Insider, one of the top 35 young innovators in the world by MIT Tech Review, and is a recipient of the ACM SIGARCH Maurice Wilkes award, Rice University’s Outstanding Young Engineering Alumni award, and the IIT Madras Distinguished Alumni award. He is also a Fellow of both the ACM and IEEE. Fun fact: Partha is one of few computer scientists to also have an Emmy award!
12:00 – 1:30 PM EDT: Lunch
Location: Event Center
12:00 – 6:00 PM EDT: Poster Session
Location: 2nd Floor Hallway 1
1:30 – 3:35 PM EDT
Session 2A: LLM Training Systems
Location: Fort Pitt
Session 2B: Speculative Decoding
Location: West End & Fort Duquesne
Session 2C: GPU Systems & Scheduling
Location: Allegheny
Session 2D: DRAM Reliability & Security
Location: Ohio & Monogahela
3:35 – 3:55 PM EDT: Coffee Break
Location: Rivers Pre-Function
3:55 – 6:00 PM EDT
Session 3A: LLM Attention & KV Cache
Location: Fort Pitt
Session 3B: Mixture-of-Experts & Efficient Inference
Location: West End & Fort Duquesne
Session 3C: 3D Gaussian Splatting & Rendering
Location: Allegheny
Session 3D: Trusted Execution Environments
Location: Ohio & Monogahela
6:30 – 7:30 PM EDT: WACI Session
Location: West End & Fort Duquesne
6:30 – 8:30 PM EDT: Business Meeting
Location: Fort Pitt
Day 2: Wednesday, March 25
8:30 – 10:35 AM EDT
Session 4A: ML Training & Monitoring
Location: Fort Pitt
Session 4B: ML Compilers & Tensor Programs
Location: West End & Fort Duquesne
Session 4C: Quantum Error Correction
Location: Allegheny
Session 4D: Processing-in-Memory
Location: Ohio & Monogahela
10:35 – 10:55 AM EDT: Coffee Break
Location: Rivers Pre-Function
10:55 – 11:55 AM EDT: Keynote 2 by Ion Stoica (Univ. of California, Berkeley)
An AI Stack: From Scaling AI Workloads to Evaluating LLMs
Location: Event Center
Abstract
Large language models (LLMs) have taken the world by storm, enabling new applications, intensifying GPU shortages, and raising concerns about the accuracy of their outputs. In this talk, I will present several projects I have worked on to address these challenges. Specifically, I will focus on Ray, a distributed framework for scaling AI workloads, vLLM and SGLang, two high-throughput inference engines for LLMs, and LMArena, a platform for accurate LLM benchmarking. I will conclude with key lessons learned and outline directions for future research.
Bio
Ion Stoica is a Professor in the EECS Department and holds the Xu Bao Chancellor Chair at the University of California, Berkeley. He is the Director of the Sky Computing Lab and the Executive Chairman of Databricks and Anyscale. His current research focuses on AI systems and cloud computing, and his work includes numerous open-source projects such as vLLM, SGLang, Chatbot Arena, SkyPilot, Ray, and Apache Spark. He is a Member of the National Academy of Engineering, an Honorary Member of the Romanian Academy, and an ACM Fellow. He has also cofounded several companies, including LMArena (2025), Anyscale (2019), Databricks (2013), and Conviva (2006).
12:00 – 1:30 PM EDT: Lunch
Location: Event Center
12:00 – 9:00 PM EDT: Poster Session
Location: 2nd Floor Hallway 1
1:30 – 3:35 PM EDT
Session 5A: Generative Model Serving
Location: Fort Pitt
Session 5B: On-Device & Edge AI
Location: West End & Fort Duquesne
Session 5C: Formal Verification
Location: Allegheny
Session 5D: Storage & Caching
Location: Ohio & Monogahela
3:35 – 3:55 PM EDT: Coffee Break
Location: Rivers Pre-Function
3:55 – 6:00 PM EDT
Session 6A: Neural Network Acceleration
Location: Fort Pitt
Session 6B: Hardware Design Languages
Location: West End & Fort Duquesne
Session 6C: Graph & Sparse Computing
Location: Allegheny
Session 6D: Disaggregated Memory Systems
Location: Ohio & Monogahela
6:00 – 9:00 PM EDT: Award Ceremony/Banquet
Location: Event Center
Day 3: Thursday, March 26
8:30 – 10:10 AM EDT
Session 7A: Fully Homomorphic Encryption
Location: Fort Pitt
Session 7B: Compilers & Code Generation
Location: West End & Fort Duquesne
Session 7C: Testing & Fuzzing
Location: Allegheny
Session 7D: Processor Microarchitecture
Location: Ohio & Monogahela
10:10 – 10:30 AM EDT: Coffee Break
Location: Rivers Pre-Function
10:30 – 11:30 AM EDT: Keynote 3 by Hillery Hunter (IBM)
Mission-Critical Enterprise Systems…What's a Mission? And What's Critical? Processor and technology requirements for enterprise computing
Location: Event Center
Abstract
Behind the scenes, mainframes (IBM Z) and IBM Power Systems fuel banking, manufacturing, healthcare, insurance, transportation, and many other critical industries. While we each touch multiple silicon-based systems daily, enterprise systems are the ones you never see, but always rely on. In this talk, we’ll look inside these systems, discuss the silicon technology, microarchitecture, and system elements which come together to deliver eight nines of system-level resiliency (99.999999% uptime). We’ll explore the changes in workloads on these systems, and discuss how new drivers like AI for fraud detection, AI for insurance claims processing, and AI-driven system operations are changing enterprise requirements.
Bio
Hillery is the General Manager for IBM Power and serves as IBM Infrastructure CTO. In this role, she is focused on setting the global strategy for both Power and Infrastructure Platform in addition to driving crossfunctional innovation and growth across IBM’s Infrastructure portfolio which includes IBM zSystems, Power, Storage, TLS and IBM Cloud. In her previous roles as the GM, Industry Clouds and CTO of IBM Cloud, she led the business and technical strategy for IBM’s industrycontextualized cloud offerings and was responsible for technical strategy for IBM’s public cloud. Prior to this role, she served as Director of Accelerated Cognitive Infrastructure in IBM Research, leading a team doing crossstack (hardware through software) optimization of AI workloads.
Her technical interests have always been interdisciplinary, spanning from silicon technology through system software, and she has served in technical and leadership roles in memory technology, Systems for AI and other areas. Hillery was appointed as an IBM Fellow in 2017, and she is a BS, MS and PhD graduate of the University of Illinois at Urbana-Champaign, where she also received the 2024 Alumni Award for Distinguished Service.
12:00 – 1:30 PM EDT: Lunch
Location: Event Center
1:30 – 3:10 PM EDT
Session 8A: GPU Programming
Location: Fort Pitt
Session 8B: Serverless & Cloud Networking
Location: West End & Fort Duquesne
Session 8C: Memory Hierarchy & Performance
Location: Allegheny
Session 8D: Reconfigurable Architectures
Location: Ohio & Monogahela
3:10 – 3:30 PM EDT: Coffee Break
Location: Rivers Pre-Function
3:30 – 5:10 PM EDT
Session 9A: Systems Profiling & Optimization
Location: Fort Pitt
Session 9B: Quantum & Emerging Computing
Location: West End & Fort Duquesne
Session 9C: Reliability & Fault Tolerance
Location: Allegheny
Session 9D: Network & Cloud Infrastructure
Location: Ohio & Monogahela
The program page was generated and formatted using Professor Saugata Ghose‘s (UIUC) Conference Program Generator.

